Creating Assertion-based Ip (integrated Circuits And Systems).

Creating Assertion-based Ip (integrated Circuits And Systems)

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ISBN details

  • ISBN 10: 0387366415
  • ISBN 13: 9780387366418


Overview

This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.

Other Details

  • Publisher: Springer
  • Language: Eng
  • Edition: 2008
  • Pages: 312
  • Date Published: 2008
  • Authors: Harry D. Foster, Adam C. Krolnik