Integration of Passive RF Front End Components in SoCs

And conclusions; Part VI. Design of a Superheterodyne Receiver Using M-Phase Filters: 39. Introduction; 40. Proposed superheterodyne receiver architecture; 41. Design and implementation of the receiver chain; 42. Measurement results; 43. Summary and conclusions; Part VII. Impact of Imperfections on the Performance of M-Phase Filters: 44. Introduction; 45. Mathematical background; 46. LO phase noise; 47. Second-order nonlinearity in the switches of the bandpass filter; 48. Quadrature error in the original 50% duty-cycle clock phases; 49. Harmonic downconversion; 50. Thermal noise of switches; 51. Parasitic capacitors of switches; 52. Switch charge injection; 53. Mismatches; 54. Summary and conclusions; Part VIII. M-Phase Filtering and Duality: 55. Introduction; 56. Dual of an electrical circuit, dual of a switch; 57. Dual of M-phase filter, differential implementation of M-phase filter and its dual; 58. Dual of M-phase high-Q filter with complex baseband impedances; 59.